•  CPU core

― 32-bit ARM Cortex-M4 core + FPU, single-cycle hardware multiply and divide instructions, support DSP instructions and MPU.

― Built-in 2KB instruction Cache, support Flash acceleration unit execution program 0 wait

― The highest frequency is 64MHz, 80DMIPS

•  Cryptographic memory

― Up to 128KByte in-chip Flash, support encrypted storage, partition management and data protection, support hardware ECC  verification, 100,000 erasing times, 10 years of data retention

― 256KByte Data Flash (some parts support)

― Up to 24KByte in-chip SRAM, including 16Kbyte SRAM1(Stop2 mode can be configured as retention) and 8 Kbyte SRAM2(both Standby and Stop2 modes can be configured as retention), supporting hardware parity check

•  Low power management

― Support Run, Sleep, LP Run, LP Sleep, Stop2, Standby mode

•  High-performance analog interface

― One 12bit 4.5Msps ADC with a variety of precision configurable, sampling rate up to 8Msps in 6bit mode, up to 16 external single-ended input channels, supporting differential mode

― Two rail-to-rail operational amplifiers with built-in programmable gain amplifier up to 32 times

―  Two high-speed analog comparators with built-in 64-level adjustable comparison reference, COMP1 support working in STOP2 mode

― One 12bit DAC, sampling rate 1Msps

― Internal 2.048V independent reference voltage reference source

― All analog interfaces support full voltage from 1.8 to 3.6V

•  Clock

― 4MHz~32MHz external high-speed crystal

― 32.768KHz External low-speed crystal

― Internal high-speed RC(HSI) 16MHz

― Internal multi-speed RC(MSI) 100K~4MHz

― Internal low-speed RC(LSI) 40KHz

― Built-in high-speed PLL

― Supports one clock output, which can be configured as low-speed or high-speed clock output

•  Reset

― Support power-on, brown-out, and external pin reset

― Support watchdog reset, software reset

•  Support up to 64 GPIOs.

•  Communication interface

― Five U(S)ART interfaces, including three USART interfaces (support 1xISO7816, 1xIrDA, LIN) and two UART interfaces

― One LPUART, support STOP2 to wake up MCU in low power consumption state

― Two SPI interfaces, the rate is up to 16 Mbps, support I2S communication

― Two I2C interfaces, the rate is up to 1 MHz, which can be configured in master/slave mode and support dual address response in slave mode

― One USB2.0 FS Device interface

― One CAN 2.0A/B bus interface