•  Core

―  A 32-bit general-purpose microcontroller based on the Arm® Cortex®-M0 core, Single-cycle hardware multiply instruction

― Run up to 48MHz

•  Encrypted memory

― Up to 64KByte embedded Flash memory, supports encrypted storage, multi-user partition management and data protection, supports hardware ECC verification, data 100,000 cycling and 10 years of data retention

― SRAM of 16KB, supporting hardware parity

•  Low-power management

― Stop mode: RTC Run, maximum 16KByte SRAM retention, CPU register retention, all IO retention

― Power Down mode: support 3 IO wakeup

•  Clock

―  HSE: 4MHz~20MHz external high-speed crystal

―  LSE: 32.768KHz external low-speed crystal

―  HSI: Internal high-speed RC OSC 8MHz

―  LSI: Internal low-speed RC OSC 30KHz

―  Built-in high-speed PLL

―  MCO: Support 2-way clock output, configurable SYSCLK, HSI, HSE, LSI, LSE, and PLL clock output that can be divided.

•  Reset

―  Support power-on/power-off/external pin reset

―  Support watchdog reset

•  Communication interface

―  6xU(S)ART, with a maximum rate of 3 Mbps, of which 2 USART interfaces (support 1xISO7816, 1xIrDA, LIN), 4x UART interfaces, 2 of which support low power (LPUART, the highest communication rate in this mode is 9600bps) , Stop mode can be awakened

―  3xSPI, up to 12 MHz, one of which supports multiplexing with I2S

―  2xI2C, the rate is up to 1 MHz, which can be configured in master/slave mode and support dual address response in slave mode. Supports dual-level communication: normal level (signal level matches chip VDD) and low level (chip VDD 3.3V or 5V, signal level 1.8V) two levels can be selected.

―  1x CAN 2.0A/B bus interface.

•  Analog interface

―  1x12bit 1Msps ADC , up to 16 external single-ended input channels

―  1xOPAMP, internal programmable gain amplifier up to 32 times

―  3xCOMP, built-in 64-level adjustable comparison reference